1. Technical Field of the Invention
The present invention relates to the field of voltage regulators and, in particular, to a linear voltage regulator having an NMOS driving stage with over-current protection.
2. Description of Related Art
A voltage regulator provides a regulated power supply to a system. Various architectures for a regulator exist ranging from linear regulators, that are simple and easy to implement, to switching regulators, that are complex but have high efficiency.
The regulated supply can be used for either off-chip or on-chip purposes. The supply that is going off-chip may encounter a situation where the output pin is erroneously shorted to ground. Huge currents might flow through the regulator resulting in damage to the circuit. Also, during startup, large currents flow through the regulator. In order to avoid such a situation, current limiting circuits are added to the regulator that provide a soft-start and also limit the current if it exceeds a preset value.
The linear regulators known in the art may use a PMOS or NMOS device for an output driver making it a low drop out (LDO) regulator. Use of PMOS driver device is done to make a low drop out regulator. These regulators usually have a loop whose stability is dependent on the capacitive load applied to the regulator. However, an open loop linear regulator also exists that provides a solution whose stability is independent of the capacitive load. This makes such a regulator extremely useful in cases where the load may have a large variation. Such a regulator has been discussed in the paper “Embedded 5 V-to-3.3 V Voltage Regulator for Supplying Digital IC s in 3.3 V CMOS Technology” in IEEE JOURNAL OF SOLID-STATE CIRCUITS.
An improvement of a normally used technique for an LDO with a PMOS driver is discussed in the published United States Patent Application No. 2003011952. FIG. 1 shows a configuration of a conventional over-current protection circuit for a voltage regulator with PMOS as an output driver. A reference voltage source 103 supplies a constant-voltage Vref to an inverting input terminal of an error amplifier 101. Output of the error amplifier 101 is connected to a gate of a PMOS output driver transistor 105, and is also connected to a gate of a PMOS sense transistor 111 and a drain of a PMOS transistor 119 of an over-current protection circuit. A source of the PMOS output driver transistor 105 is connected to an input terminal IN and a drain of the same is connected to an output terminal OUT. A voltage dividing circuit consisting of resistors 107 and 109 supplies a divided voltage of an output voltage VOUT to a non-inverting input terminal of the error amplifier 101.
In the case where the PMOS output driver transistor 105 and the first PMOS sense transistor 111 are operating in the saturated state, the amount of current flowing through the pmos sense transistor 111 is in proportion to the current flowing through the output driver pmos transistor 105. A voltage difference generated across the resistor 113 is small and the NMOS transistor 115 is in a non-conducting state. Therefore, since a current does not flow to the NMOS transistor 115, a voltage difference is not generated across the resistor 117 and the PMOS transistor 119 is also in a non-conducting state.
However, when a current supplied by the PMOS output driver transistor 105 increases, current flowing to the PMOS sense transistor 111 also increases in proportion thereto and the voltage generated across the resistor 113 also increases. Thus, the NMOS transistor 115 starts conducting. When the NMOS transistor 115 becomes conductive and a voltage difference generated across the resistor 117 increases, the PMOS transistor 119 conducts increasing the gate voltage of the PMOS output driver transistor 105. Thus, a driving ability of the PMOS output driver transistor 105 decreases and an output voltage OUT falls.
While the above over current protection system can be used in voltage regulators with a PMOS driver stage, no such over current protection circuitry is available for voltage regulators with NMOS devices at the driving stage. In many applications, voltage regulators with NMOS driver stage are preferred as PMOS devices consume a relatively larger amount of silicon area.
FIG. 2 shows a circuit that improves the previous technique. The circuit makes the operating states of the PMOS output driver transistor 105 and the first PMOS sense transistor 111 the same so as to set a ratio of currents flowing to both the transistors equal to a transistor size ratio. This is done by ensuring that the drain voltage of the first PMOS sense transistor 111 is the same as that of the output driver transistor 111. Consequently, the circuit solves the problem that a load current under which an over-current protection operates becomes inaccurate by a decrease in output voltage due to an abnormal operation of the over-current protection circuit in the case in which a difference of an input voltage VIN and an output voltage VOUT is small, and due to the influence of channel length modulation in the case in which the difference of an input voltage VIN and an output voltage VOUT is large. However, the circuits mentioned only provide a solution for an LDO linear regulator and no similar systems exist for voltage regulators with NMOS device at the driving stage.
U.S. Pat. No. 3,771,021 provides a solution with an npn transistor as an output driver. Reference is now made to FIG. 3. A circuit is mentioned that senses the current through the load and stops the supply of the base current to the output driver transistor. An over-current to a load is sensed in a differential amplifier. As this current increases, the current supply to the base of the output driver transistor decreases reducing the output voltage. This further increases the current drawn by the differential amplifier from the base of the output driver transistor resulting in regenerative foldback. This decreases the base current of the npn transistor, decreasing the output current. But this circuit uses a resistance in the load path to sense the over-current. This introduces the need for an extra connectivity to be made between the load and the regulator circuitry and also introduces error as the whole potential is now not available across the load. Also, devices manufactured in bipolar technology require comparatively more silicon area than CMOS technology devices.
Hence, as discussed above, over current protection systems exists for voltage regulators with PMOS driver stage. However, there is no similar suitable protection circuitry available for voltage regulators that use NMOS. Therefore, there is a need for over current protection system in linear voltage regulators that uses an NMOS driving stage. Most importantly, there is a need for protection circuitry in an open loop or a closed loop configuration of the voltage regulator using an NMOS driver device.